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Network Wizard for VHDL Test Benches
|
Records | |
| t_udp_header | |
| src_port | std_logic_vector ( 15 downto 0 ) |
| Source port. | |
| dest_port | std_logic_vector ( 15 downto 0 ) |
| Destination port. | |
| length | std_logic_vector ( 15 downto 0 ) |
| The length in bytes of the UDP header and UDP data. | |
| chksum | std_logic_vector ( 15 downto 0 ) |
| Checksum. | |